Architecture of Computing Systems – ARCS 2015: 28th by Luís Miguel Pinho Pinho, Wolfgang Karl, Albert Cohen, Uwe

By Luís Miguel Pinho Pinho, Wolfgang Karl, Albert Cohen, Uwe Brinkschulte

This booklet constitutes the court cases of the twenty eighth overseas convention on structure of Computing structures, ARCS 2015, held in Porto, Portugal, in March 2015.

The 19 papers provided including 3 invited papers have been conscientiously reviewed and chosen from forty five submissions. The papers are equipped in six periods overlaying the subjects: undefined, layout, purposes, belief and privateness, real-time concerns and a most sensible papers session.

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However, the instructions belonging to consecutive iterations of the loop cannot be executed in parallel because of data dependence between G and D, limiting the benefit of adopting this optimization. The Unrolling of outer loop [6], the Pipelining of inner loop [6], the Pipelining of outer loop [11] and the Vectorization of inner loop [12] cannot be applied to the example because of the variable number of iterations of inner loop and because of inter-iterations data dependence. On the contrary, outer loop vectorization can be applied to the considered example: the right part of Fig.

In this way the 2 divisions can be synthesized as 1 (1 divisor), 2 (1 divisor which executes the two divisions in pipeline) or 3 (2 different divisors) according to the choices taken by the rest of the High Level Synthesis design flow. Instructions Transformation. Different types of transformations are applied in this step. , while loops). All the scalar variables defined inside the DoAll loop (with the exception of the induction variables of the nested loops) are transformed in vector variables, while the variables defined outside the DoAll loop are not modified.

While this paper focuses on avionics, the results are applicable to adjacent markets which have similar stringent security and safety requirements such as automotive, railway and industrial control. Acknowledgments. This work was supported by the projects ARAMiS and SIBASE funded by the German Federal Ministry of Education and Research (BMBF) under the funding ID 01IS11035R and 01IS13020B. We also thank Xilinx and PLX Technologies for their support. Special thanks also to our colleagues from Airbus Defence and Space, especially Peter Ganal.

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